The invention relates to dynamic frequency dividers. More particularly, the invention relates to dynamic frequency dividers with improved leakage tolerance.
Frequency dividers are widely used in high-performance designs in complementary metal oxide semiconductor (CMOS) technology. Two types of frequency dividers include static frequency dividers and dynamic frequency dividers. A static frequency divider, built from a static flip-flop, can typically only operate at low frequencies. A dynamic frequency divider, built from a dynamic flip-flop, can typically only operate at high frequencies.
A static frequency divider is commonly combined with a dynamic frequency divider in order to provide a combined circuit that can operate over a wider frequency range. The combined circuit is partitioned so that for certain operating frequencies (e.g., high frequencies), data is processed by the dynamic frequency divider, while for other operating frequencies (e.g., low frequencies), data is processed by the static frequency divider. Even with this combined circuit, the range of operating frequencies is limited. In addition, the combined circuit requires additional area for the two frequency dividers and also results in overlapping circuitry.
A dynamic frequency divider operates in a frequency range from a minimum frequency (FMIN) to a maximum frequency (Fmax). The dynamic frequency divider can be built from a dynamic flip-flip such as, for example, a sense amplifier based flip-flop (SAFF).
CMOS technology scaling is performed in order to provide enhanced speed while maintaining acceptable power consumption by reducing the threshold voltage and supply voltage. For a dynamic frequency divider, CMOS technology scaling causes the maximum frequency to increase. But this also causes the minimum frequency to increase because of leakage across the transistors. There are two types of leakage: subthreshold leakage and gate leakage. Subthreshold leakage, which is the more dominant leakage, occurs because of the decreasing threshold voltage. Gate leakage occurs because of the increasing thinness of the gate oxide. As the threshold voltage decreases and the gate oxide becomes thinner, the transistor continues to conduct current even when the transistor is in the OFF state, thus causing the minimum operating frequency to increase.
It would therefore be desirable to provide a dynamic frequency divider circuit with improved leakage tolerance that can operate over a wide frequency range.